p 18.


register/path sizes


	current
	design


a	8		data register bits

b	8		internal data path

c	40		address register bits

d	40		address bus bits

e	8		number of bits located by each address
				(data bus width)
			


if b < a, process data register in sections; logical operations, add/subtract


if e < c, may need several mem accesses to load a new value into the address register

		(increment address pointer and write to the next section of ar)



